PIC16F527 |
|
CONFIG (address:0x0FFF, mask:0x00FF) |
|
FOSC -- Oscillator |
|
FOSC = LP |
0x0FF8 |
LP oscillator and 18 ms DRT. |
|
|
FOSC = XT |
0x0FF9 |
XT oscillator and 18 ms DRT. |
|
|
FOSC = HS |
0x0FFA |
HS oscillator and 18 ms DRT. |
|
|
FOSC = EC |
0x0FFB |
EC oscillator with I/O function on OSC2/CLKOUT and 10 us DRT. |
|
|
FOSC = INTRC_IO |
0x0FFC |
INTRC with I/O function on OSC2/CLKOUT and 10 us DRT. |
|
|
FOSC = INTRC_CLKOUT |
0x0FFD |
INTRC with CLKOUT function on OSC2/CLKOUT and 10 us DRT. |
|
|
FOSC = ExtRC_IO |
0x0FFE |
EXTRC with I/O function on OSC2/CLKOUT and 10 us DRT. |
|
|
FOSC = ExtRC_CLKOUT |
0x0FFF |
EXTRC with CLKOUT function on OSC2/CLKOUT and 10 us DRT. |
|
|
WDTE -- Watchdog Timer Enable bit |
|
WDTE = OFF |
0x0FF7 |
Disabled. |
|
|
WDTE = ON |
0x0FFF |
Enabled. |
|
|
CP -- Code Protection bit |
|
CP = ON |
0x0FEF |
Code protection on. |
|
|
CP = OFF |
0x0FFF |
Code protection off. |
|
|
MCLRE -- Master Clear Enable bit |
|
MCLRE = OFF |
0x0FDF |
MCLR functions as I/O, MCLR internally tied to Vdd. |
|
|
MCLRE = ON |
0x0FFF |
MCLR functions as MCLR. |
|
|
IOSCFS -- Internal Oscillator Frequency Select |
|
IOSCFS = 4MHz |
0x0FBF |
4 MHz INTOSC Speed. |
|
|
IOSCFS = 8MHz |
0x0FFF |
8 MHz INTOSC Speed. |
|
|
CPSW -- Code Protection bit - Flash Data Memory |
|
CPSW = ON |
0x0F7F |
Code protection on. |
|
|
CPSW = OFF |
0x0FFF |
Code protection off. |
|
|
BOREN |
|
BOREN = OFF |
0x0EFF |
BOR Disabled. |
|
|
BOREN = ON |
0x0FFF |
BOR Enabled. |
|
|
DRTEN |
|
DRTEN = OFF |
0x0DFF |
DRT Disabled. |
|
|
DRTEN = ON |
0x0FFF |
DRT Enabled. |
|